Changeset 1394


Ignore:
Timestamp:
Aug 30, 2011, 4:02:54 PM (8 years ago)
Author:
ashriram
Message:

Related work fixed

Location:
docs/HPCA2012
Files:
3 edited

Legend:

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Added
Removed
  • docs/HPCA2012/10-related.tex

    r1376 r1394  
    22\label{section:related}
    33
    4 
    5 Substantial literature has arisen addressing the performance concerns of XML processing and XML parsers.
    6 % Event-based SAX (Simple API for XML) parsers
    7 % avoid the tree construction costs of the more flexible DOM (Document Object Model) parsers \cite{Perkins05}.
    8 Nicola and John specifically identified the traditional method of XML parsing as a threat to database
    9 performance and outlined a number of potential directions for improving performance \cite{NicolaJohn03}.
    10 The commercial importance of XML parsing has spurred the development of numerous multi-threaded and hardware-based approaches:
    11 Multithreaded XML techniques include preparsing the XML file to locate key partitioning points \cite{ZhangPanChiu09}
    12 and speculative p-DFAs \cite{ZhangPanChiu09}. Hardware methods include custom XML chips \cite{Leventhal2009} and
    13 FPGA-based implementations \cite{DaiNiZhu2010}.
     4There has been work in the past which has sought to address the
     5overheads of text processing in specific applications (e.g., XML
     6parsers) and have adopted specialized hardware and software solutions
     7for each application.
     8% Event-based SAX (Simple API for XML) parsers avoid the tree
     9% construction costs of the more flexible DOM (Document Object Model)
     10% parsers \cite{Perkins05}.
     11Nicola and John specifically identified the traditional method of XML
     12parsing as a threat to database performance and outlined a number of
     13potential directions for improving performance \cite{NicolaJohn03}.
     14The commercial importance of XML parsing has spurred the development
     15of numerous multi-threaded and hardware-based approaches:
     16Multithreaded XML techniques include preparsing the XML file to locate
     17key partitioning points \cite{ZhangPanChiu09} and speculative p-DFAs
     18\cite{ZhangPanChiu09}. Hardware methods include custom XML chips
     19\cite{Leventhal2009} and FPGA-based implementations
     20\cite{DaiNiZhu2010}.  Recently Cameron et
     21al.~\cite{CameronHerdyLin2008, cameron-EuroPar2011} accelerated XML
     22parsing using SSE instructions. Finally, other have explored the
     23design of custom hardware for bit parallel operations in network
     24processors~\cite{tan-sherwood-isca-2005}.
    1425
    1526
    16 Parallel bit stream technology using Intel SSE extensions was first introduced for
    17 XML parsing by Cameron, Herdy and Lin \cite{CameronHerdyLin2008},
    18 and recently extended to incorporate the concept of parallel
    19 scanning using bitstream addition \cite{cameron-EuroPar2011}.
    20 This work extends that prior work with the development of
    21 a broader architecture, tool chain and run-time environment
    22 for supporting parallel bit stream applications more widely,
    23 a detailed performance and energy assessment on three generations
    24 of Intel processors supporting 128-bit SSE extensions, scaling and assessment
    25 of the technology to take advantage the new 256-bit AVX technology,
    26 further porting and assessment of the technology using the Neon SIMD extensions on the
    27 ARM processor, as well as development of the first multithreaded
    28 Parabix implementation.
     27In this paper, we have introduce parallel bit streams as a general
     28abstraction to parallelize and improve the performance general text
     29processing. We have developed a compiler tool chain and the runtime to
     30enable bit streams to exploit SIMD extensions found on commodity
     31processors.  We are also the first to perform a detailed analysis of
     32SIMD instruction extensions across three generations of intel
     33processors including the new 256 bit AVX extensions. Finally, we have
     34shown the benefits of using multithreading in conjunction with data
     35parallel phases of the application.
  • docs/HPCA2012/reference.bib

    r1363 r1394  
    549549
    550550
     551
     552@inproceedings{tan-sherwood-isca-2005,
     553 author = {Tan, Lin and Sherwood, Timothy},
     554 title = {A High Throughput String Matching Architecture for Intrusion Detection and Prevention},
     555 booktitle = {Proceedings of the 32nd annual international symposium on Computer Architecture},
     556 year = {2005},
     557}
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