# Changeset 1405 for docs

Ignore:
Timestamp:
Aug 31, 2011, 2:37:34 PM (8 years ago)
Message:

xml chip ref

Location:
docs/HPCA2012
Files:
3 edited

### Legend:

Unmodified
 r1404 then exploits the SIMD extensions on commodity processors (SSE/AVX on x86, Neon on ARM) to process hundreds of character positions in an input stream simultaneously.  To achieve transposition, Parabix exploits sophisticated SIMD instructions that enable data elements to be packed and unpacked from registers in a regular manner which improves the overall cache access behavior of the application resulting in significantly fewer misses and better utilization. Parabix also dramatically reduces branches in parsing code resulting in a more efficient pipeline and substantially improves register/cache utilization which minimizes energy wasted on data transfers. input stream simultaneously. To transform character-oriented data into bit streams Parabix exploits sophisticated SIMD instructions that enable data elements to be packed into registers. This improves the overall cache behavior of the application resulting in significantly fewer misses and better utilization.  Parabix also dramatically reduces branches in the parsing routines resulting in a more efficient pipeline and substantially improves register utilization which minimizes energy wasted on data transfers. We apply Parabix technology to the problem of XML parsing.  XML is a focus in on overall transactions per second, while in applications in network switches and cell phones, latency and energy are of paramount importance.  Traditional software-based XML parsers have many importance.  Conventional software-based XML parsers have many inefficiencies including considerable branch misprediction penalties due to complex input-dependent branching structures as well as poor use of memory bandwidth and data caches due to byte-at-a-time processing and multiple buffering.  XML ASIC chips have been around for over 6 years, but typically lag behind CPUs in technology due to cost constraints. Our focus is how much we can improve performance of use of caches and memory bandwidth due to byte-at-a-time processing.  XML ASIC chips have been around since early 2003, but typically lag behind CPUs in technology due to cost constraints~\cite{xmlchip}. They also focus mainly on speeding up the parser computation itself and are limited by the poor memory behavior Our focus is how much we can improve performance of the XML parser on commodity processors with Parabix technology. In the end, as summarized by Figure~\ref{perf-energy} our Parabix-based XML parser improves the Figure~\ref{perf-energy} showcases the overall efficiency of our framework. The Parabix-XML parser improves the performance %by ?$\times$ and energy efficiency %by ?$\times$ %?$cycles/input-byte$ performance of ASIC XML parsers.%~\cite{}. parsers~\cite{xmlchip,DaiNiZhu2010}. \footnote{The actual energy consumption of the XML ASIC chips is not published by the companies.}