Changeset 1405 for docs/HPCA2012


Ignore:
Timestamp:
Aug 31, 2011, 2:37:34 PM (8 years ago)
Author:
ashriram
Message:

xml chip ref

Location:
docs/HPCA2012
Files:
3 edited

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  • docs/HPCA2012/01-intro.tex

    r1404 r1405  
    3939then exploits the SIMD extensions on commodity processors (SSE/AVX on
    4040x86, Neon on ARM) to process hundreds of character positions in an
    41 input stream simultaneously.  To achieve transposition, Parabix
    42 exploits sophisticated SIMD instructions that enable data elements to
    43 be packed and unpacked from registers in a regular manner which
    44 improves the overall cache access behavior of the application
    45 resulting in significantly fewer misses and better utilization.
    46 Parabix also dramatically reduces branches in parsing code resulting
    47 in a more efficient pipeline and substantially improves register/cache
    48 utilization which minimizes energy wasted on data transfers.
     41input stream simultaneously. To transform character-oriented data into
     42bit streams Parabix exploits sophisticated SIMD instructions that
     43enable data elements to be packed into registers. This improves the
     44overall cache behavior of the application resulting in significantly
     45fewer misses and better utilization.  Parabix also dramatically
     46reduces branches in the parsing routines resulting in a more efficient
     47pipeline and substantially improves register utilization which
     48minimizes energy wasted on data transfers.
    4949
    5050We apply Parabix technology to the problem of XML parsing.  XML is a
     
    5757focus in on overall transactions per second, while in applications in
    5858network switches and cell phones, latency and energy are of paramount
    59 importance.  Traditional software-based XML parsers have many
     59importance.  Conventional software-based XML parsers have many
    6060inefficiencies including considerable branch misprediction penalties
    6161due to complex input-dependent branching structures as well as poor
    62 use of memory bandwidth and data caches due to byte-at-a-time
    63 processing and multiple buffering.  XML ASIC chips have been around
    64 for over 6 years, but typically lag behind CPUs in technology due to
    65 cost constraints. Our focus is how much we can improve performance of
     62use of caches and memory bandwidth due to byte-at-a-time
     63processing.  XML ASIC chips have been around since early 2003, but typically lag behind CPUs in technology due to
     64cost constraints~\cite{xmlchip}. They also focus mainly on speeding up the parser
     65computation itself and are limited by the poor memory behavior
     66Our focus is how much we can improve performance of
    6667the XML parser on commodity processors with Parabix technology.
    6768
    68 In the end, as summarized by
    69 Figure~\ref{perf-energy} our Parabix-based XML parser improves the
     69
     70Figure~\ref{perf-energy} showcases the overall efficiency of our
     71framework. The Parabix-XML parser improves the
    7072performance %by ?$\times$
    7173and energy efficiency %by ?$\times$
     
    7476%?$cycles/input-byte$
    7577performance of ASIC XML
    76 parsers.%~\cite{}.
     78parsers~\cite{xmlchip,DaiNiZhu2010}.
    7779\footnote{The actual energy consumption of the XML
    7880  ASIC chips is not published by the companies.}
  • docs/HPCA2012/reference.bib

    r1394 r1405  
    556556 year = {2005},
    557557}
     558
     559@inproceedings{xmlchip,
     560  author = {M. Leventhal and E. Lemoine},
     561  title = {The XML Chip at 6 Years},
     562  booktitle = {In Proceedings of the International Symposium on Processing XML Efficiently.},
     563  year = {Aug 2009}
     564  }
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