# Changeset 1407 for docs/HPCA2012/03-research.tex

Ignore:
Timestamp:
Aug 31, 2011, 3:13:36 PM (8 years ago)
Message:

Minor bug fixes

File:
1 edited

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Unmodified
 r1398 point to determine other bit streams.  In particular, Parabix uses the basis bit streams to construct \emph{character-class bit streams} in which each $\tt 1$ bit indicates the presense of a significant which each $\tt 1$ bit indicates the presence of a significant character (or class of characters) in the parsing process. Character-class bit streams may then be used to compute \emph{lexical Unlike the single-cursor approach of traditional text parsers, these allow Parabix to process multiple cursors in parallel. Error bit streams are often the byproduct or derivative of computing lexical bit streams and can be used to identify any well-formedness issues found during the parsing process. The presense of a $\tt 1$ in an error stream indicates that the lexical stream cannot be issues found during the parsing process. The presence of a $\tt 1$ in an error stream indicates that the lexical stream cannot be trusted to be completely accurate and it may be necessary to perform some sequential parsing on that section to determine the cause and severity of the error. %How errors are handled depends on the logical implications of the error and go beyond the scope of this paper. sixteen 8-bit fields. These operations were originally developed for 128-bit Altivec operations on Power PC as well as 64-bit MMX and 128-bit SSE operations on Intel but have recently extended to support the new 256-bit AVX operations on Intel as well as the 128-bit \NEON{} operations on the ARM architecture. We have ported parabix to a wide variety of processor architectures demonstrating its applicability to commodity SIMD hardware. We currently take advantage of the 128-bit Altivec operations on the Power PC, 64-bit MMX and 128-bit SSE operations on previous generation Intel platforms, the latest 256-bit AVX extensions on the Sandybridge processor, and finally the 128-bit \NEON{} operations on ARM.