Changeset 1693 for docs


Ignore:
Timestamp:
Nov 18, 2011, 5:22:11 PM (8 years ago)
Author:
lindanl
Message:

Minor changes.

Location:
docs/HPCA2012
Files:
1 added
4 edited

Legend:

Unmodified
Added
Removed
  • docs/HPCA2012/02-background.tex

    r1633 r1693  
    5555{\ttfamily{\verb`<`Products\verb`>`}}\+ \\
    5656{\ttfamily{\verb`<`Product ID=\verb`"`}}{\bfseries\ttfamily{0001}}{\ttfamily{\verb`"`\verb`>`}}\+ \\
    57 {\ttfamily{\verb`<`ProductName Language=\verb`"`}}{\bfseries\ttfamily{English}}{\ttfamily{\verb`"`\verb`>`}}{\bfseries\ttfamily{Widget}}{\ttfamily{\verb`<`/ProductName\verb`>` }}\\
    58 {\ttfamily{\verb`<`ProductName Language=\verb`"`}}{\bfseries\ttfamily{French}}{\ttfamily{\verb`"`\verb`>`}}{\bfseries\ttfamily{Bitoniau}}{\ttfamily{\verb`<`/ProductName\verb`>` }}\\
     57{\ttfamily{\verb`<`ProductName Lang=\verb`"`}}{\bfseries\ttfamily{English}}{\ttfamily{\verb`"`\verb`>`}}{\bfseries\ttfamily{Widget}}{\ttfamily{\verb`<`/ProductName\verb`>` }}\\
     58{\ttfamily{\verb`<`ProductName Lang=\verb`"`}}{\bfseries\ttfamily{French}}{\ttfamily{\verb`"`\verb`>`}}{\bfseries\ttfamily{Bitoniau}}{\ttfamily{\verb`<`/ProductName\verb`>` }}\\
    5959{\ttfamily{\verb`<`Company\verb`>`}}{\bfseries\ttfamily{ABC}}{\ttfamily{\verb`<`/Company\verb`>` }}\\
    6060{\ttfamily{\verb`<`Price\verb`>`}}{\bfseries\ttfamily{\$19.95}}{\ttfamily{\verb`<`/Price\verb`>` }}\- \\
  • docs/HPCA2012/03-research.tex

    r1651 r1693  
    2929
    3030\begin{figure}[h]
    31 
    3231\begin{center}
    3332\begin{tabular}{r c c c c }
     
    157156of which go beyond the scope of this paper.
    158157
    159 \begin{figure}[h]
     158\begin{figure*}[htbp]
    160159
    161160\begin{center}
     
    175174\caption{Lexical Parsing in Parabix}
    176175\label{fig:ParabixParsingExample}
    177 \end{figure}
     176\end{figure*}
    178177
    179178% For example, using the source data from Figure \ref{fig:Parabix1StarttagExample},
     
    224223
    225224\begin{figure}[tbh]
    226 
     225{\footnotesize
    227226\begin{center}
    228227
     
    239238
    240239\end{center}
    241 
     240}
    242241\caption{Character Class Compiler Input/Output}
    243242\label{fig:CCC}
     
    245244
    246245\begin{figure}[tbh]
    247 
    248 \begin{center}
    249 
    250 \begin{tabular}{r l}
    251 \ttfamily{\bfseries INPUT:}
    252 & \verb`def parse_tags(classes, errors):` \\
    253 & \verb`  classes.C0 = Alpha` \\
    254 & \verb`  classes.C1 = Rangle` \\
    255 & \verb`  classes.C2 = Langle` \\
    256 & \verb`  L0 = bitutil.Advance(C2)` \\
    257 & \verb`  errors.E0 = L0 &~ C0` \\
    258 & \verb`  L1 = bitutil.ScanThru(L0, C0)` \\
    259 & \verb`  errors.E1 = L1 &~ C1` \\ \\
    260 
    261 \ttfamily{\bfseries OUTPUT:}
    262 & \verb`struct Parse_tags {` \\
    263 & \verb`  Parse_tags() { CarryInit(carryQ, 2); }` \\
    264 & \verb`  void do_block(Classes & classes, Errors & errors) {` \\
    265 & \verb`    BitBlock L0, L1;` \\
    266 & \verb`    classes.C0 = Alpha;` \\
    267 & \verb`    classes.C1 = Rangle;` \\
    268 & \verb`    classes.C2 = Langle;` \\
    269 & \verb`    L0 = BitBlock_advance_ci_co(C2, carryQ, 0);` \\
    270 & \verb`    errors.E0 = simd_andc(L0, C0);` \\
    271 & \verb`    L1 = BitBlock_scanthru_ci_co(L0, C0, carryQ, 1);` \\
    272 & \verb`    errors.E1 = simd_andc(L1, C1);` \\
    273 & \verb`    CarryQ_Adjust(carryQ, 2);` \\
    274 & \verb`  }` \\
    275 & \verb`  CarryDeclare(carryQ, 2);` \\
    276 & \verb`};` \\
    277 \end{tabular}
    278 
    279 \end{center}
    280 
     246{\footnotesize
     247\begin{center}
     248
     249\begin{tabular}{l}
     250\ttfamily{\bfseries INPUT:} \\
     251\verb`def parse_tags(classes, errors):` \\
     252\verb`  classes.C0 = Alpha` \\
     253\verb`  classes.C1 = Rangle` \\
     254\verb`  classes.C2 = Langle` \\
     255\verb`  L0 = bitutil.Advance(C2)` \\
     256\verb`  errors.E0 = L0 &~ C0` \\
     257\verb`  L1 = bitutil.ScanThru(L0, C0)` \\
     258\verb`  errors.E1 = L1 &~ C1` \\ \\
     259
     260\ttfamily{\bfseries OUTPUT:} \\
     261\verb`struct Parse_tags {` \\
     262\verb`  Parse_tags() { CarryInit(carryQ, 2); }` \\
     263\verb`  void do_block(Classes & classes, Errors & errors){` \\
     264\verb`    BitBlock L0, L1;` \\
     265\verb`    classes.C0 = Alpha;` \\
     266\verb`    classes.C1 = Rangle;` \\
     267\verb`    classes.C2 = Langle;` \\
     268\verb`    L0 = BitBlock_advance_ci_co(C2, carryQ, 0);` \\
     269\verb`    errors.E0 = simd_andc(L0, C0);` \\
     270\verb`    L1 = BitBlock_scanthru_ci_co(L0, C0, carryQ, 1);` \\
     271\verb`    errors.E1 = simd_andc(L1, C1);` \\
     272\verb`    CarryQ_Adjust(carryQ, 2);` \\
     273\verb`  }` \\
     274\verb`  CarryDeclare(carryQ, 2);` \\
     275\verb`};` \\
     276\end{tabular}
     277
     278\end{center}
     279}
    281280\caption{Parallel Block Compiler (Pablo) Input/Output}
    282281\label{fig:Pablo}
  • docs/HPCA2012/09-pipeline.tex

    r1692 r1693  
    7979controlling the overall size of the ring buffer. Whenever a faster stage
    8080runs ahead, it will effectively cause the ring buffer to fill up and
    81 force that stage to stall.
     81force that stage to stall. Figure \ref{circular_buffer} shows the performance
     82with different number of entries of the circular buffer, where
     836 entries gives the best performance.
    8284
    83 
     85\begin{figure}[htbp]
     86\includegraphics[width=0.5\textwidth]{plots/circular_buffer.pdf}
     87\caption{Performance (CPU Cycles per kB)}
     88\label{circular_buffer}
     89\end{figure}
    8490
    8591Figure~\ref{multithread_perf} demonstrates the performance improvement
     
    106112\label{pipeline_performance}
    107113}
    108 \subfigure[Avg. Power Consumption]{
     114\subfigure[Avg. Power Consumption (Watts)]{
    109115\includegraphics[width=0.32\textwidth]{plots/pipeline_power.pdf}
    110116\label{pipeline_power}
  • docs/HPCA2012/10-related.tex

    r1652 r1693  
    2323instructions~\cite{sse4}. Recently, Cameron et
    2424al.~\cite{CameronHerdyLin2008, cameron-EuroPar2011} designed an
    25 accelerated XML parser using widely available SSE2
    26 instructions. Finally, others have explored the design of custom
     25accelerated XML parser using widely available SSE2 instructions
     26and proposed an inductive doubling instruction set ~\cite{CameronLin2009},
     27by which the performance can further improved.
     28Finally, others have explored the design of custom
    2729hardware for bit parallel operations for text search in network
    2830processors~\cite{tan-sherwood-isca-2005}.
     
    3537
    3638
    37 
    38 
    39 
    40 In this paper, we have introduce parallel bit streams as a general
    41 abstraction to parallelize and improve the performance general text
    42 processing. We have developed a compiler tool chain and the runtime to
    43 enable bit streams to exploit SIMD extensions found on commodity
    44 processors.  We are also the first to perform a detailed analysis of
    45 SIMD instruction extensions across three generations of Intel
    46 processors including the new 256-bit AVX extensions. Finally, we have
    47 shown the benefits of using multithreading in conjunction with data
    48 parallel phases of the application.
     39% In this paper, we have introduce parallel bit streams as a general
     40% abstraction to parallelize and improve the performance general text
     41% processing. We have developed a compiler tool chain and the runtime to
     42% enable bit streams to exploit SIMD extensions found on commodity
     43% processors.  We are also the first to perform a detailed analysis of
     44% SIMD instruction extensions across three generations of Intel
     45% processors including the new 256-bit AVX extensions. Finally, we have
     46% shown the benefits of using multithreading in conjunction with data
     47% parallel phases of the application.
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