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Timestamp:
Nov 18, 2011, 5:22:11 PM (8 years ago)
Author:
lindanl
Message:

Minor changes.

File:
1 edited

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  • docs/HPCA2012/09-pipeline.tex

    r1692 r1693  
    7979controlling the overall size of the ring buffer. Whenever a faster stage
    8080runs ahead, it will effectively cause the ring buffer to fill up and
    81 force that stage to stall.
     81force that stage to stall. Figure \ref{circular_buffer} shows the performance
     82with different number of entries of the circular buffer, where
     836 entries gives the best performance.
    8284
    83 
     85\begin{figure}[htbp]
     86\includegraphics[width=0.5\textwidth]{plots/circular_buffer.pdf}
     87\caption{Performance (CPU Cycles per kB)}
     88\label{circular_buffer}
     89\end{figure}
    8490
    8591Figure~\ref{multithread_perf} demonstrates the performance improvement
     
    106112\label{pipeline_performance}
    107113}
    108 \subfigure[Avg. Power Consumption]{
     114\subfigure[Avg. Power Consumption (Watts)]{
    109115\includegraphics[width=0.32\textwidth]{plots/pipeline_power.pdf}
    110116\label{pipeline_power}
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