Changeset 2706 for proto


Ignore:
Timestamp:
Nov 30, 2012, 8:38:30 PM (7 years ago)
Author:
cameron
Message:

Compiler passes conformance tests in experimental mode

File:
1 edited

Legend:

Unmodified
Added
Removed
  • proto/Compiler/pablo.py

    r2700 r2706  
    322322
    323323def Strategic_CCGO_Factory(carryInfoSet):
    324     #ccgo = CCGO.testCCGO(carryInfoSet, 'carryQ')
     324  if experimentalMode:
    325325    ops = carryInfoSet.operation_count
    326326    if ops == 0: ccgo = CCGO.CCGO()
     
    329329    elif ops <= 8: ccgo = CCGO_HMCPS.HMCPS_CCGO(16, carryInfoSet, 'carryG', '__c')
    330330    else: ccgo = CCGO_HMCPS.HMCPS_CCGO(8, carryInfoSet, 'carryG', '__c')
    331     return ccgo
     331  else:
     332    ccgo = CCGO.testCCGO(carryInfoSet, 'carryQ')
     333  return ccgo
    332334
    333335
     
    374376    saved_state = (self.block_no, self.operation_count, self.carryvar, self.carryin, self.carryout, self.current_carry, self.current_adv_n)
    375377    (self.carryvar, self.carryin, self.current_carry, self.current_adv_n) = (local_carryvar, '', 0, 0)
     378    #(self.carryvar, self.carryin) = (local_carryvar, '')
    376379    self.ccgo.EnterLocalWhileBlock(self.operation_count);
    377380    inner_while = self.generic_visit(whileNode)
     
    564567    assert adv_nCounter().count(ifNode) == 0, "Advance(x,n) within if: illegal\n"
    565568    self.generic_visit(ifNode)
    566     if carries == 0 or self.carryin == "":
     569    if carries == 0: # or self.carryin == "":
    567570      self.last_stmt = ifNode
    568571      return ifNode
     
    10341037                stream_function.initializations = StreamInitializations().xfrm(node)
    10351038               
     1039                if self.add_dump_stmts:
     1040                        Add_SIMD_Register_Dump().xfrm(node)
    10361041                t = TempifyBuiltins()
    10371042                t.xfrm(node)
     
    10551060                AssertCompiler().xfrm(node)
    10561061                AssertCompiler().xfrm(final_block_node)
    1057                 if self.add_dump_stmts:
    1058                         Add_SIMD_Register_Dump().xfrm(node)
    1059                         Add_SIMD_Register_Dump().xfrm(final_block_node)
    10601062
    10611063                if self.add_assert_bitblock_align:
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