Changeset 454


Ignore:
Timestamp:
Jul 9, 2010, 3:37:39 PM (9 years ago)
Author:
cameron
Message:

Generate advance_with_carry in all modes

Location:
proto
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • proto/Compiler/bitexpr.py

    r429 r454  
    101101        self.op_C = "adc128"
    102102        self.carry = carry
    103         self.op_advance_noint = "advance_with_carry"
    104         self.op_add_noint = "adc128_simd"
     103        self.op_advance = "advance_with_carry"
    105104        BitExpr.__init__(self, expr1, expr2, "Add")
    106105    def show(self): return 'Add(%s, %s)' % (self.operand1.show(), self.operand2.show())
     
    111110        self.op_C = "sbb128"
    112111        self.brw = brw
    113         self.op_sub_noint = "sbb128_simd"
    114112        BitExpr.__init__(self, expr1, expr2, "Sub")
    115113    def show(self): return 'Sub(%s, %s)' % (self.operand1.show(), self.operand2.show())
  • proto/Compiler/py2bitexpr.py

    r429 r454  
    15141514            elif isinstance(s[0].RHS, bitexpr.FalseLiteral):
    15151515                code += "0;\n"
    1516     elif isinstance(s[0], bitexpr.BitAssign) and (isinstance(s[0].RHS, bitexpr.Add) or isinstance(s[0].RHS, bitexpr.Sub)) and int_carry:
    1517             if isinstance(s[0].RHS, bitexpr.Add):
     1516    elif isinstance(s[0], bitexpr.BitAssign) and (isinstance(s[0].RHS, bitexpr.Add) or isinstance(s[0].RHS, bitexpr.Sub)):
     1517            if isinstance(s[0].RHS, bitexpr.Add) and (s[0].RHS.operand1.varname == s[0].RHS.operand2.varname):
     1518                code += " "*indent + s[0].RHS.op_advance + "("
     1519                code += s[0].RHS.operand1.varname
     1520                code += ', '
     1521                code += s[0].RHS.carry
     1522                code += ", "
     1523                code += s[0].LHS.varname
     1524                code += ");\n"
     1525            elif isinstance(s[0].RHS, bitexpr.Add):
    15181526                code += " "*indent + s[0].RHS.op_C + "("
    15191527                code += s[0].RHS.operand1.varname
     
    15351543                code += s[0].LHS.varname
    15361544                code += ");\n"
    1537     elif isinstance(s[0], bitexpr.BitAssign) and (isinstance(s[0].RHS, bitexpr.Add) or isinstance(s[0].RHS, bitexpr.Sub)) and (not int_carry):
    1538                         if isinstance(s[0].RHS, bitexpr.Add) and (s[0].RHS.operand1.varname == s[0].RHS.operand2.varname):
    1539                                 code += " "*indent + s[0].RHS.op_advance_noint + "("
    1540                                 code += s[0].RHS.operand1.varname
    1541                                 code += ', '
    1542                                 code += s[0].RHS.carry
    1543                                 code += ", "
    1544                                 code += s[0].LHS.varname
    1545                                 code += ");\n"
    1546                         elif isinstance(s[0].RHS, bitexpr.Add):
    1547                                 code += " "*indent + s[0].RHS.op_add_noint + "("
    1548                                 code += s[0].RHS.operand1.varname
    1549                                 code += ', '
    1550                                 code += s[0].RHS.operand2.varname
    1551                                 code += ', '
    1552                                 code += s[0].RHS.carry
    1553                                 code += ", "
    1554                                 code += s[0].LHS.varname
    1555                                 code += ");\n"
    1556                         elif isinstance(s[0].RHS, bitexpr.Sub):
    1557                                 code += " "*indent + s[0].RHS.op_sub_noint + "("
    1558                                 code += s[0].RHS.operand1.varname
    1559                                 code += ', '
    1560                                 code += s[0].RHS.operand2.varname
    1561                                 code += ', '
    1562                                 code += s[0].RHS.brw
    1563                                 code += ", "
    1564                                 code += s[0].LHS.varname
    1565                                 code += ");\n"
    15661545    s.pop(0)
    15671546    return code+print_block_stmts(s, int_carry, indent)
  • proto/Compiler/workspace/sse_simd.h

    r433 r454  
    2727#endif
    2828typedef __m128i SIMD_type;
    29 
    30 
    31 #define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \
    32   __asm__  ("sahf\n\t" \
    33         "adc %[e1], %[z1]\n\t" \
    34         "adc %[e2], %[z2]\n\t" \
    35         "lahf\n\t" \
    36      : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
    37          : "[z1]" (x1), "[z2]" (x2), \
    38            [e1] "r" (y1), [e2] "r" (y2), \
    39            "[carryflag]" (carry) \
    40          : "cc")
    41 
    42 #define adc128(first, second, carry, sum) \
    43 do\
    44 {\
    45   union {__m128i bitblock;\
    46          uint64_t int64[2];} rslt;\
    47 \
    48   union {__m128i bitblock;\
    49          uint64_t int64[2];} x;\
    50 \
    51   union {__m128i bitblock;\
    52          uint64_t int64[2];} y;\
    53 \
    54   x.bitblock = first;\
    55   y.bitblock = second;\
    56 \
    57   double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\
    58   sum = rslt.bitblock;\
    59 }while(0)
    60 
    61 
    62 
    63 #define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \
    64   __asm__  ("sahf\n\t" \
    65         "sbb %[e1], %[z1]\n\t" \
    66         "sbb %[e2], %[z2]\n\t" \
    67         "lahf\n\t" \
    68      : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
    69          : "[z1]" (x1), "[z2]" (x2), \
    70            [e1] "r" (y1), [e2] "r" (y2), \
    71            "[carryflag]" (carry) \
    72          : "cc")
    73 
    74 #define sbb128(first, second, carry, sum) \
    75 do\
    76 { union {__m128i bitblock;\
    77          uint64_t int64[2];} rslt;\
    78 \
    79   union {__m128i bitblock;\
    80          uint64_t int64[2];} x;\
    81 \
    82   union {__m128i bitblock;\
    83          uint64_t int64[2];} y;\
    84 \
    85   x.bitblock = first;\
    86   y.bitblock = second;\
    87 \
    88   double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \
    89                    rslt.int64[0], rslt.int64[1], carry);\
    90   sum = rslt.bitblock;\
    91 }while(0)
    92 
    93 
    94 
    95 #define adc128_simd(x, y, carry,  sum) \
    96 do{ \
    97   SIMD_type gen = simd_and(x, y); \
    98   SIMD_type prop = simd_or(x, y); \
    99   SIMD_type partial = simd_add_64(simd_add_64(x, y), carry); \
    100   SIMD_type c1 = sisd_slli(simd_srli_64(simd_or(gen, simd_andc(prop, partial)), 63), 64); \
    101   sum = simd_add_64(c1, partial); \
    102   carry = sisd_srli(simd_or(gen, simd_andc(prop, sum)), 127); \
    103 } while(0)
    104 
    105 
    106 #define sbb128_simd(x, y, borrow, difference) \
    107 do {\
    108   SIMD_type gen = simd_andc(y, x); \
    109   SIMD_type prop = simd_not(simd_xor(x, y)); \
    110   SIMD_type partial = simd_sub_64(simd_sub_64(x, y), borrow); \
    111   SIMD_type b1 = sisd_slli(simd_srli_64(simd_or(gen, simd_and(prop, partial)), 63), 64); \
    112   difference = simd_sub_64(partial, b1); \
    113   borrow = sisd_srli(simd_or(gen, simd_and(prop, difference)), 127); \
    114 }while(0)
    115 
    116 
    117 #define advance_with_carry(cursor, carry, rslt)\
    118 do{\
    119   SIMD_type shift_out = simd_srli_64(cursor, 63);\
    120   SIMD_type low_bits = simd_mergel_64(shift_out, carry);\
    121   carry = sisd_srli(shift_out, 64);\
    122   rslt = simd_or(simd_add_64(cursor, cursor), low_bits);\
    123 }while(0)
    124 
    125 
    12629
    12730
  • proto/parabix2/compiled/block_carry.h

    r452 r454  
    1818typedef uint64_t CarryType;
    1919
    20 #define Carry0 = 0
     20#define Carry0 0
    2121
    2222#define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \
     
    5050}while(0)
    5151
     52
     53
    5254#define advance_with_carry(cursor, carry, rslt)\
    53 do{\
    54 union {__m128i bitblock;\
    55 uint64_t int64[2];} z;\
    56 \
    57 union {__m128i bitblock;\
    58 uint64_t int64[2];} x;\
    59 \
    60 x.bitblock = cursor;\
    61 \
    62 double_int64_adc(x.int64[0], x.int64[1], x.int64[0], x.int64[1], z.int64[0], z.int64[1], carry);\
    63 rslt = z.bitblock;\
    64 }while(0)
     55    adc128(cursor, cursor, carry, rslt)
     56
    6557
    6658#define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \
Note: See TracChangeset for help on using the changeset viewer.