# Changeset 4561

Ignore:
Timestamp:
May 15, 2015, 8:33:45 AM (4 years ago)
Message:

Wrap up

Location:
docs/Working/icGrep
Files:
3 edited

Unmodified
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Removed
• ## docs/Working/icGrep/evaluation.tex

 r4560 on a newer Intel i7-4700MQ machine, considering three SIMD ISA alternatives and both single-threaded and multi-threaded versions. All speedups are relative to the base single-threaded SSE2 performance on the i7-2600 machine. All speedups are relative to the base single-threaded SSE2 performance on this machine, which is given in seconds per GB in the first column. % The SSE2 results are again using the generic binaries compiled for compatibility \end{table} In each case, the use of three-operand form with AVX1 confers a slight speedup.  The change to use 256 bits with AVX2 gives a further overall improvement, but some mixed results due to the limitations of 256 bit addition.   Combining the AVX2 ISA with multithreading gives and average overall 61\% speedup compared to base. % Interestingly, the SSE2 column of Table \ref{table:relperf} shows that by simply using a newer hardware and compiler
• ## docs/Working/icGrep/unicode-re.tex

 r4559 \paragraph{Unicode MatchStar.} The $\mathit{MatchStar}(M, C)$ operation directly implements The $\text{MatchStar}(M, C)$ operation directly implements the operation of finding all positions reachable from a marker bit in $M$ through a character class repetition of
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