Ignore:
Timestamp:
Jul 13, 2015, 2:11:13 PM (4 years ago)
Author:
cameron
Message:

Upgrade LLVM to 3.6.1

Location:
icGREP/icgrep-devel/llvm-3.6.1.src
Files:
1 edited
1 moved

Legend:

Unmodified
Added
Removed
  • icGREP/icgrep-devel/llvm-3.6.1.src/test/CodeGen/R600/sra.ll

    r4574 r4664  
    1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
    2 ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
    3 
    4 ;EG-CHECK-LABEL: {{^}}ashr_v2i32:
    5 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    6 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    7 
    8 ;SI-CHECK-LABEL: {{^}}ashr_v2i32:
    9 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    10 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
     2;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s
     3;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=VI %s
     4
     5;EG-LABEL: {{^}}ashr_v2i32:
     6;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     7;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     8
     9;SI-LABEL: {{^}}ashr_v2i32:
     10;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     11;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     12
     13;VI-LABEL: {{^}}ashr_v2i32:
     14;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     15;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    1116
    1217define void @ashr_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
     
    1924}
    2025
    21 ;EG-CHECK-LABEL: {{^}}ashr_v4i32:
    22 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    23 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    24 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    25 ;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
    26 
    27 ;SI-CHECK-LABEL: {{^}}ashr_v4i32:
    28 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    29 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    30 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    31 ;SI-CHECK: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     26;EG-LABEL: {{^}}ashr_v4i32:
     27;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     28;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     29;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     30;EG: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
     31
     32;SI-LABEL: {{^}}ashr_v4i32:
     33;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     34;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     35;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     36;SI: v_ashr_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     37
     38;VI-LABEL: {{^}}ashr_v4i32:
     39;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     40;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     41;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
     42;VI: v_ashrrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
    3243
    3344define void @ashr_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
     
    4051}
    4152
    42 ;EG-CHECK-LABEL: {{^}}ashr_i64:
    43 ;EG-CHECK: ASHR
    44 
    45 ;SI-CHECK-LABEL: {{^}}ashr_i64:
    46 ;SI-CHECK: s_ashr_i64 s[{{[0-9]}}:{{[0-9]}}], s[{{[0-9]}}:{{[0-9]}}], 8
     53;EG-LABEL: {{^}}ashr_i64:
     54;EG: ASHR
     55
     56;SI-LABEL: {{^}}ashr_i64:
     57;SI: s_ashr_i64 s[{{[0-9]}}:{{[0-9]}}], s[{{[0-9]}}:{{[0-9]}}], 8
     58
     59;VI-LABEL: {{^}}ashr_i64:
     60;VI: s_ashr_i64 s[{{[0-9]}}:{{[0-9]}}], s[{{[0-9]}}:{{[0-9]}}], 8
     61
    4762define void @ashr_i64(i64 addrspace(1)* %out, i32 %in) {
    4863entry:
     
    5368}
    5469
    55 ;EG-CHECK-LABEL: {{^}}ashr_i64_2:
    56 ;EG-CHECK: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
    57 ;EG-CHECK: LSHL {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
    58 ;EG-CHECK: LSHL {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
     70;EG-LABEL: {{^}}ashr_i64_2:
     71;EG: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
     72;EG: LSHL {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
     73;EG: LSHL {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
    5974;EG_CHECK-DAG: ADD_INT {{\*? *}}[[BIGSH:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
    60 ;EG-CHECK-DAG: LSHR {{\*? *}}[[LOSMTMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], [[SHIFT]]
    61 ;EG-CHECK-DAG: OR_INT {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], {{[[LOSMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
    62 ;EG-CHECK-DAG: ASHR {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], [[OPHI]], {{PS|[[SHIFT]]}}
    63 ;EG-CHECK-DAG: ASHR {{\*? *}}[[LOBIG:T[0-9]+\.[XYZW]]], [[OPHI]], literal
    64 ;EG-CHECK-DAG: ASHR {{\*? *}}[[HIBIG:T[0-9]+\.[XYZW]]], [[OPHI]], literal
    65 ;EG-CHECK-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
    66 ;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
    67 ;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
    68 
    69 ;SI-CHECK-LABEL: {{^}}ashr_i64_2:
    70 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     75;EG-DAG: LSHR {{\*? *}}[[LOSMTMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], [[SHIFT]]
     76;EG-DAG: OR_INT {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], {{[[LOSMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
     77;EG-DAG: ASHR {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], [[OPHI]], {{PS|[[SHIFT]]}}
     78;EG-DAG: ASHR {{\*? *}}[[LOBIG:T[0-9]+\.[XYZW]]], [[OPHI]], literal
     79;EG-DAG: ASHR {{\*? *}}[[HIBIG:T[0-9]+\.[XYZW]]], [[OPHI]], literal
     80;EG-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
     81;EG-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
     82;EG-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
     83
     84;SI-LABEL: {{^}}ashr_i64_2:
     85;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     86
     87;VI-LABEL: {{^}}ashr_i64_2:
     88;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
     89
    7190define void @ashr_i64_2(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
    7291entry:
     
    7998}
    8099
    81 ;EG-CHECK-LABEL: {{^}}ashr_v2i64:
    82 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
    83 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
    84 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHA]]
    85 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHB]]
    86 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    87 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    88 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHA]]
    89 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHB]]
    90 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHA]]
    91 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHB]]
    92 ;EG-CHECK-DAG: OR_INT
    93 ;EG-CHECK-DAG: OR_INT
    94 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
    95 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
    96 ;EG-CHECK-DAG: ASHR
    97 ;EG-CHECK-DAG: ASHR
    98 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    99 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    100 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
    101 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
    102 ;EG-CHECK-DAG: CNDE_INT
    103 ;EG-CHECK-DAG: CNDE_INT
    104 ;EG-CHECK-DAG: CNDE_INT
    105 ;EG-CHECK-DAG: CNDE_INT
    106 
    107 ;SI-CHECK-LABEL: {{^}}ashr_v2i64:
    108 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
    109 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     100;EG-LABEL: {{^}}ashr_v2i64:
     101;EG-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
     102;EG-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
     103;EG-DAG: LSHL {{\*? *}}[[COMPSHA]]
     104;EG-DAG: LSHL {{\*? *}}[[COMPSHB]]
     105;EG-DAG: LSHL {{.*}}, 1
     106;EG-DAG: LSHL {{.*}}, 1
     107;EG-DAG: ASHR {{.*}}, [[SHA]]
     108;EG-DAG: ASHR {{.*}}, [[SHB]]
     109;EG-DAG: LSHR {{.*}}, [[SHA]]
     110;EG-DAG: LSHR {{.*}}, [[SHB]]
     111;EG-DAG: OR_INT
     112;EG-DAG: OR_INT
     113;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
     114;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
     115;EG-DAG: ASHR
     116;EG-DAG: ASHR
     117;EG-DAG: ASHR {{.*}}, literal
     118;EG-DAG: ASHR {{.*}}, literal
     119;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
     120;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
     121;EG-DAG: CNDE_INT
     122;EG-DAG: CNDE_INT
     123;EG-DAG: CNDE_INT
     124;EG-DAG: CNDE_INT
     125
     126;SI-LABEL: {{^}}ashr_v2i64:
     127;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     128;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     129
     130;VI-LABEL: {{^}}ashr_v2i64:
     131;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
     132;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
    110133
    111134define void @ashr_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
     
    118141}
    119142
    120 ;EG-CHECK-LABEL: {{^}}ashr_v4i64:
    121 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
    122 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
    123 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
    124 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
    125 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHA]]
    126 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHB]]
    127 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHC]]
    128 ;EG-CHECK-DAG: LSHL {{\*? *}}[[COMPSHD]]
    129 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    130 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    131 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    132 ;EG-CHECK-DAG: LSHL {{.*}}, 1
    133 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHA]]
    134 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHB]]
    135 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHC]]
    136 ;EG-CHECK-DAG: ASHR {{.*}}, [[SHD]]
    137 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHA]]
    138 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHB]]
    139 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHA]]
    140 ;EG-CHECK-DAG: LSHR {{.*}}, [[SHB]]
    141 ;EG-CHECK-DAG: OR_INT
    142 ;EG-CHECK-DAG: OR_INT
    143 ;EG-CHECK-DAG: OR_INT
    144 ;EG-CHECK-DAG: OR_INT
    145 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
    146 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
    147 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
    148 ;EG-CHECK-DAG: ADD_INT  {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
    149 ;EG-CHECK-DAG: ASHR
    150 ;EG-CHECK-DAG: ASHR
    151 ;EG-CHECK-DAG: ASHR
    152 ;EG-CHECK-DAG: ASHR
    153 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    154 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    155 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    156 ;EG-CHECK-DAG: ASHR {{.*}}, literal
    157 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
    158 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
    159 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
    160 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
    161 ;EG-CHECK-DAG: CNDE_INT
    162 ;EG-CHECK-DAG: CNDE_INT
    163 ;EG-CHECK-DAG: CNDE_INT
    164 ;EG-CHECK-DAG: CNDE_INT
    165 ;EG-CHECK-DAG: CNDE_INT
    166 ;EG-CHECK-DAG: CNDE_INT
    167 ;EG-CHECK-DAG: CNDE_INT
    168 ;EG-CHECK-DAG: CNDE_INT
    169 
    170 ;SI-CHECK-LABEL: {{^}}ashr_v4i64:
    171 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
    172 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
    173 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
    174 ;SI-CHECK: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     143;EG-LABEL: {{^}}ashr_v4i64:
     144;EG-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
     145;EG-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
     146;EG-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
     147;EG-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
     148;EG-DAG: LSHL {{\*? *}}[[COMPSHA]]
     149;EG-DAG: LSHL {{\*? *}}[[COMPSHB]]
     150;EG-DAG: LSHL {{\*? *}}[[COMPSHC]]
     151;EG-DAG: LSHL {{\*? *}}[[COMPSHD]]
     152;EG-DAG: LSHL {{.*}}, 1
     153;EG-DAG: LSHL {{.*}}, 1
     154;EG-DAG: LSHL {{.*}}, 1
     155;EG-DAG: LSHL {{.*}}, 1
     156;EG-DAG: ASHR {{.*}}, [[SHA]]
     157;EG-DAG: ASHR {{.*}}, [[SHB]]
     158;EG-DAG: ASHR {{.*}}, [[SHC]]
     159;EG-DAG: ASHR {{.*}}, [[SHD]]
     160;EG-DAG: LSHR {{.*}}, [[SHA]]
     161;EG-DAG: LSHR {{.*}}, [[SHB]]
     162;EG-DAG: LSHR {{.*}}, [[SHA]]
     163;EG-DAG: LSHR {{.*}}, [[SHB]]
     164;EG-DAG: OR_INT
     165;EG-DAG: OR_INT
     166;EG-DAG: OR_INT
     167;EG-DAG: OR_INT
     168;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
     169;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
     170;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
     171;EG-DAG: ADD_INT  {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
     172;EG-DAG: ASHR
     173;EG-DAG: ASHR
     174;EG-DAG: ASHR
     175;EG-DAG: ASHR
     176;EG-DAG: ASHR {{.*}}, literal
     177;EG-DAG: ASHR {{.*}}, literal
     178;EG-DAG: ASHR {{.*}}, literal
     179;EG-DAG: ASHR {{.*}}, literal
     180;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
     181;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
     182;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
     183;EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
     184;EG-DAG: CNDE_INT
     185;EG-DAG: CNDE_INT
     186;EG-DAG: CNDE_INT
     187;EG-DAG: CNDE_INT
     188;EG-DAG: CNDE_INT
     189;EG-DAG: CNDE_INT
     190;EG-DAG: CNDE_INT
     191;EG-DAG: CNDE_INT
     192
     193;SI-LABEL: {{^}}ashr_v4i64:
     194;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     195;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     196;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     197;SI: v_ashr_i64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
     198
     199;VI-LABEL: {{^}}ashr_v4i64:
     200;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
     201;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
     202;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
     203;VI: v_ashrrev_i64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
    175204
    176205define void @ashr_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
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