Ignore:
Timestamp:
Feb 6, 2018, 4:57:35 PM (15 months ago)
Author:
nmedfort
Message:

More work on the pipeline I/O rate handling

File:
1 edited

Legend:

Unmodified
Added
Removed
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_builder.cpp

    r5843 r5865  
    166166    Value * bVec = fwCast(fw, b);
    167167    return CreateSelect(CreateICmpULT(aVec, bVec), aVec, bVec);
     168}
     169
     170Value * IDISA_Builder::mvmd_sll(unsigned fw, Value * value, Value * shift) {
     171    VectorType * const vecTy = cast<VectorType>(value->getType());
     172    IntegerType * const intTy = getIntNTy(vecTy->getBitWidth());
     173    value = CreateBitCast(value, intTy);
     174    shift = CreateZExtOrTrunc(CreateMul(shift, ConstantInt::get(shift->getType(), fw)), intTy);
     175    return CreateBitCast(CreateShl(value, shift), vecTy);
     176}
     177
     178Value * IDISA_Builder::mvmd_srl(unsigned fw, Value * value, Value * shift) {
     179    VectorType * const vecTy = cast<VectorType>(value->getType());
     180    IntegerType * const intTy = getIntNTy(vecTy->getBitWidth());
     181    value = CreateBitCast(value, intTy);
     182    shift = CreateZExtOrTrunc(CreateMul(shift, ConstantInt::get(shift->getType(), fw)), intTy);
     183    return CreateBitCast(CreateLShr(value, shift), vecTy);
    168184}
    169185
     
    579595}
    580596
    581 IDISA_Builder::IDISA_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
     597IDISA_Builder::IDISA_Builder(LLVMContext & C, unsigned vectorWidth, unsigned stride)
    582598: CBuilder(C)
    583599, mBitBlockWidth(vectorWidth)
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