Changeset 6105


Ignore:
Timestamp:
Jun 21, 2018, 1:40:07 PM (4 weeks ago)
Author:
cameron
Message:

NativeBitWidth? for idisa_builders, laneWidth replaces stride

Location:
icGREP/icgrep-devel/icgrep
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_avx_builder.h

    r6099 r6105  
    1414class IDISA_AVX_Builder : public IDISA_SSE2_Builder {
    1515public:
    16 
    17     IDISA_AVX_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    18     : IDISA_Builder(C, vectorWidth, stride)
    19     , IDISA_SSE2_Builder(C, vectorWidth, stride)
     16    const unsigned NativeBitBlockWidth = 256;
     17    IDISA_AVX_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned laneWidth)
     18    : IDISA_Builder(C, NativeBitBlockWidth, vectorWidth, laneWidth)
     19    , IDISA_SSE2_Builder(C, vectorWidth, laneWidth)
    2020    {
    2121
     
    3232class IDISA_AVX2_Builder : public IDISA_AVX_Builder {
    3333public:
    34 
    35     IDISA_AVX2_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    36     : IDISA_Builder(C, vectorWidth, stride)
    37     , IDISA_AVX_Builder(C, vectorWidth, stride) {
     34    const unsigned NativeBitBlockWidth = 256;
     35    IDISA_AVX2_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned laneWidth)
     36    : IDISA_Builder(C, NativeBitBlockWidth, vectorWidth, laneWidth)
     37    , IDISA_AVX_Builder(C, vectorWidth, laneWidth) {
    3838
    3939    }
     
    6363class IDISA_AVX512F_Builder : public IDISA_AVX2_Builder {
    6464public:
    65 
    66     IDISA_AVX512F_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    67     : IDISA_Builder(C, vectorWidth, stride)
    68     , IDISA_AVX2_Builder(C, vectorWidth, stride) {
     65    const unsigned NativeBitBlockWidth = 512;
     66    IDISA_AVX512F_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned laneWidth)
     67    : IDISA_Builder(C, NativeBitBlockWidth, vectorWidth, laneWidth)
     68    , IDISA_AVX2_Builder(C, vectorWidth, laneWidth) {
    6969        getAVX512Features();
    7070    }
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_builder.cpp

    r6096 r6105  
    2828    assert (a->getType()->getPrimitiveSizeInBits() == ty->getPrimitiveSizeInBits());
    2929    return CreateBitCast(a, ty);
     30}
     31
     32void IDISA_Builder::UnsupportedFieldWidthError(const unsigned fw, std::string op_name) {
     33    llvm::report_fatal_error(op_name + ": Unsupported field width: " +  std::to_string(fw));
    3034}
    3135
     
    8791
    8892Value * IDISA_Builder::simd_fill(unsigned fw, Value * a) {
    89     if (fw < 8) report_fatal_error("Unsupported field width: simd_fill " + std::to_string(fw));
     93    if (fw < 8) UnsupportedFieldWidthError(fw, "simd_fill");
    9094    const unsigned field_count = mBitBlockWidth/fw;
    9195    Type * singleFieldVecTy = VectorType::get(getIntNTy(fw), 1);
     
    110114
    111115Value * IDISA_Builder::simd_sub(unsigned fw, Value * a, Value * b) {
    112     if (fw < 8) report_fatal_error("Unsupported field width: sub " + std::to_string(fw));
     116    if (fw == 1) {
     117        return simd_xor(a, b);
     118    }
     119    if (fw < 8) UnsupportedFieldWidthError(fw, "sub");
    113120    return CreateSub(fwCast(fw, a), fwCast(fw, b));
    114121}
    115122
    116123Value * IDISA_Builder::simd_mult(unsigned fw, Value * a, Value * b) {
    117     if (fw < 8) report_fatal_error("Unsupported field width: mult " + std::to_string(fw));
     124    if (fw < 8) UnsupportedFieldWidthError(fw, "mult");
    118125    return CreateMul(fwCast(fw, a), fwCast(fw, b));
    119126}
     
    134141
    135142Value * IDISA_Builder::simd_gt(unsigned fw, Value * a, Value * b) {
    136     if (fw < 8) report_fatal_error("Unsupported field width: gt " + std::to_string(fw));
     143    if (fw < 8) UnsupportedFieldWidthError(fw, "gt");
    137144    return CreateSExt(CreateICmpSGT(fwCast(fw, a), fwCast(fw, b)), fwVectorType(fw));
    138145}
     
    146153        return simd_or(ugt_0, simd_slli(32, ugt_0, fw/2));
    147154    }
    148     if (fw < 8) report_fatal_error("Unsupported field width: ugt " + std::to_string(fw));
     155    if (fw < 8) UnsupportedFieldWidthError(fw, "ugt");
    149156    return CreateSExt(CreateICmpUGT(fwCast(fw, a), fwCast(fw, b)), fwVectorType(fw));
    150157}
    151158
    152159Value * IDISA_Builder::simd_lt(unsigned fw, Value * a, Value * b) {
    153     if (fw < 8) report_fatal_error("Unsupported field width: lt " + std::to_string(fw));
     160    if (fw < 8) UnsupportedFieldWidthError(fw, "lt");
    154161    return CreateSExt(CreateICmpSLT(fwCast(fw, a), fwCast(fw, b)), fwVectorType(fw));
    155162}
    156163
    157164Value * IDISA_Builder::simd_ult(unsigned fw, Value * a, Value * b) {
    158     if (fw < 8) report_fatal_error("Unsupported field width: ult " + std::to_string(fw));
     165    if (fw < 8) UnsupportedFieldWidthError(fw, "ult");
    159166    return CreateSExt(CreateICmpULT(fwCast(fw, a), fwCast(fw, b)), fwVectorType(fw));
    160167}
     
    177184        return simd_or(hi_rslt, lo_rslt);
    178185    }
    179     if (fw < 8) report_fatal_error("Unsupported field width: ult " + std::to_string(fw));
     186    if (fw < 8) UnsupportedFieldWidthError(fw, "ult");
    180187    return CreateSExt(CreateICmpUGE(fwCast(fw, a), fwCast(fw, b)), fwVectorType(fw));
    181188}
    182189
    183190Value * IDISA_Builder::simd_max(unsigned fw, Value * a, Value * b) {
    184     if (fw < 8) report_fatal_error("Unsupported field width: max " + std::to_string(fw));
     191    if (fw < 8) UnsupportedFieldWidthError(fw, "max");
    185192    Value * aVec = fwCast(fw, a);
    186193    Value * bVec = fwCast(fw, b);
     
    201208
    202209Value * IDISA_Builder::simd_min(unsigned fw, Value * a, Value * b) {
    203     if (fw < 8) report_fatal_error("Unsupported field width: min " + std::to_string(fw));
     210    if (fw < 8) UnsupportedFieldWidthError(fw, "min");
    204211    Value * aVec = fwCast(fw, a);
    205212    Value * bVec = fwCast(fw, b);
     
    234241
    235242Value * IDISA_Builder::mvmd_dsll(unsigned fw, Value * a, Value * b, Value * shift) {
    236     if (fw < 8) report_fatal_error("Unsupported field width: mvmd_dsll " + std::to_string(fw));
     243    if (fw < 8) UnsupportedFieldWidthError(fw, "mvmd_dsll");
    237244    const auto field_count = mBitBlockWidth/fw;
    238245    Type * fwTy = getIntNTy(fw);
     
    280287
    281288Value * IDISA_Builder::simd_srai(unsigned fw, Value * a, unsigned shift) {
    282     if (fw < 8) report_fatal_error("Unsupported field width: srai " + std::to_string(fw));
     289    if (fw < 8) UnsupportedFieldWidthError(fw, "srai");
    283290    return CreateAShr(fwCast(fw, a), shift);
    284291}
     
    417424        return CreateOr(CreateAnd(a1, c), CreateAnd(CreateXor(c, b1), b1));
    418425    } else {
    419         if (fw < 8) report_fatal_error("Unsupported field width: simd_if " + std::to_string(fw));
     426        if (fw < 8) UnsupportedFieldWidthError(fw, "simd_if");
    420427        Value * aVec = fwCast(fw, a);
    421428        Value * bVec = fwCast(fw, b);
     
    430437        return esimd_mergeh(fw * 2, abl, abh);
    431438    }
    432     if (fw < 4) report_fatal_error("Unsupported field width: mergeh " + std::to_string(fw));
     439    if (fw < 4) UnsupportedFieldWidthError(fw, "mergeh");
    433440    const auto field_count = mBitBlockWidth / fw;
    434441    Constant * Idxs[field_count];
     
    446453        return esimd_mergel(fw * 2, abl, abh);
    447454    }
    448     if (fw < 4) report_fatal_error("Unsupported field width: mergel " + std::to_string(fw));
     455    if (fw < 4) UnsupportedFieldWidthError(fw, "mergel");
    449456    const auto field_count = mBitBlockWidth / fw;
    450457    Constant * Idxs[field_count];
     
    457464
    458465Value * IDISA_Builder::esimd_bitspread(unsigned fw, Value * bitmask) {
    459     if (fw < 8) report_fatal_error("Unsupported field width: bitspread " + std::to_string(fw));
     466    if (fw < 8) UnsupportedFieldWidthError(fw, "bitspread");
    460467    const auto field_count = mBitBlockWidth / fw;
    461468    Type * field_type = getIntNTy(fw);
     
    511518
    512519Value * IDISA_Builder::hsimd_packh_in_lanes(unsigned lanes, unsigned fw, Value * a, Value * b) {
    513     if (fw < 16) report_fatal_error("Unsupported field width: packh_in_lanes " + std::to_string(fw));
     520    if (fw < 16) UnsupportedFieldWidthError(fw, "packh_in_lanes");
    514521    const unsigned fw_out = fw / 2;
    515522    const unsigned fields_per_lane = mBitBlockWidth / (fw_out * lanes);
     
    530537
    531538Value * IDISA_Builder::hsimd_packl_in_lanes(unsigned lanes, unsigned fw, Value * a, Value * b) {
    532     if (fw < 16) report_fatal_error("Unsupported field width: packl_in_lanes " + std::to_string(fw));
     539    if (fw < 16) UnsupportedFieldWidthError(fw, "packl_in_lanes");
    533540    const unsigned fw_out = fw / 2;
    534541    const unsigned fields_per_lane = mBitBlockWidth / (fw_out * lanes);
     
    549556
    550557Value * IDISA_Builder::hsimd_signmask(unsigned fw, Value * a) {
    551     if (fw < 8) report_fatal_error("Unsupported field width: hsimd_signmask " + std::to_string(fw));
     558    if (fw < 8) UnsupportedFieldWidthError(fw, "hsimd_signmask");
    552559    Value * mask = CreateICmpSLT(fwCast(fw, a), ConstantAggregateZero::get(fwVectorType(fw)));
    553560    mask = CreateBitCast(mask, getIntNTy(mBitBlockWidth/fw));
     
    579586
    580587Value * IDISA_Builder::mvmd_slli(unsigned fw, Value * a, unsigned shift) {
    581     if (fw < 8) report_fatal_error("Unsupported field width: mvmd_slli " + std::to_string(fw));
     588    if (fw < 8) UnsupportedFieldWidthError(fw, "mvmd_slli");
    582589    Value * shifted = mvmd_dslli(fw, a, Constant::getNullValue(fwVectorType(fw)), shift);
    583590    return shifted;
     
    585592
    586593Value * IDISA_Builder::mvmd_srli(unsigned fw, Value * a, unsigned shift) {
    587     if (fw < 8) report_fatal_error("Unsupported field width: mvmd_srli " + std::to_string(fw));
     594    if (fw < 8) UnsupportedFieldWidthError(fw, "mvmd_srli");
    588595    const auto field_count = mBitBlockWidth / fw;
    589596    return mvmd_dslli(fw, Constant::getNullValue(fwVectorType(fw)), a, field_count - shift);
     
    591598
    592599Value * IDISA_Builder::mvmd_dslli(unsigned fw, Value * a, Value * b, unsigned shift) {
    593     if (fw < 8) report_fatal_error("Unsupported field width: mvmd_dslli " + std::to_string(fw));
     600    if (fw < 8) UnsupportedFieldWidthError(fw, "mvmd_dslli");
    594601    const auto field_count = mBitBlockWidth/fw;
    595602    Constant * Idxs[field_count];
     
    601608
    602609Value * IDISA_Builder::mvmd_shuffle(unsigned fw, Value * table, Value * index_vector) {
    603     report_fatal_error("Unsupported field width: mvmd_shuffle " + std::to_string(fw));
     610    UnsupportedFieldWidthError(fw, "mvmd_shuffle");
    604611}
    605612   
     
    616623
    617624llvm::Value * IDISA_Builder::mvmd_compress(unsigned fw, llvm::Value * a, llvm::Value * select_mask) {
    618     report_fatal_error("Unsupported field width: mvmd_compress " + std::to_string(fw));
     625    UnsupportedFieldWidthError(fw, "mvmd_compress");
    619626}
    620627
     
    774781
    775782
    776 IDISA_Builder::IDISA_Builder(LLVMContext & C, unsigned vectorWidth, unsigned stride)
     783IDISA_Builder::IDISA_Builder(LLVMContext & C, unsigned nativeVectorWidth, unsigned vectorWidth, unsigned laneWidth)
    777784: CBuilder(C)
     785, mNativeBitBlockWidth(nativeVectorWidth)
    778786, mBitBlockWidth(vectorWidth)
    779 , mStride(stride)
    780 , mBitBlockType(VectorType::get(IntegerType::get(C, 64), vectorWidth / 64))
     787, mLaneWidth(laneWidth)
     788, mBitBlockType(VectorType::get(IntegerType::get(C, mLaneWidth), vectorWidth / mLaneWidth))
    781789, mZeroInitializer(Constant::getNullValue(mBitBlockType))
    782790, mOneInitializer(Constant::getAllOnesValue(mBitBlockType))
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_builder.h

    r6087 r6105  
    4242public:
    4343
    44     IDISA_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride);
     44    IDISA_Builder(llvm::LLVMContext & C, unsigned nativeVectorWidth, unsigned vectorWidth, unsigned laneWidth);
    4545
    4646    virtual ~IDISA_Builder();
     
    5454    unsigned getBitBlockWidth() const {
    5555        return mBitBlockWidth;
    56     }
    57 
    58     unsigned getStride() const {
    59         return mStride;
    6056    }
    6157
     
    201197
    202198protected:
     199    LLVM_ATTRIBUTE_NORETURN void UnsupportedFieldWidthError(const unsigned FieldWidth, std::string op_name);
     200   
    203201    llvm::Constant * bit_interleave_byteshuffle_table(unsigned fw);  // support function for merge using shuffles.
    204202
     203    const unsigned              mNativeBitBlockWidth;
    205204    const unsigned              mBitBlockWidth;
    206     const unsigned              mStride;
     205    const unsigned              mLaneWidth;
    207206    llvm::VectorType * const    mBitBlockType;
    208207    llvm::Constant * const      mZeroInitializer;
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_i64_builder.h

    r5489 r6105  
    1313class IDISA_I64_Builder : public virtual IDISA_Builder {
    1414public:
     15    const unsigned NativeBitBlockWidth = 64;
    1516 
    16     IDISA_I64_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned stride)
    17     : IDISA_Builder(C, bitBlockWidth, stride) {
     17    IDISA_I64_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned laneWidth)
     18    : IDISA_Builder(C, NativeBitBlockWidth, bitBlockWidth, laneWidth) {
    1819
    1920    }
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_nvptx_builder.h

    r5489 r6105  
    1313class IDISA_NVPTX20_Builder : public IDISA_I64_Builder {
    1414public:
    15    
    16     IDISA_NVPTX20_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    17     : IDISA_Builder(C, vectorWidth, stride)
    18     , IDISA_I64_Builder(C, vectorWidth, stride)
    19     , groupThreads(stride / vectorWidth)
     15    const unsigned NativeBitBlockWidth = 4096;
     16    IDISA_NVPTX20_Builder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned laneWidth)
     17    : IDISA_Builder(C, NativeBitBlockWidth, vectorWidth, laneWidth)
     18    , IDISA_I64_Builder(C, laneWidth, laneWidth)
     19    , groupThreads(vectorWidth / laneWidth)
    2020    , barrierFunc(nullptr)
    2121    , tidFunc(nullptr)
     
    2424    , carry(nullptr)
    2525    , bubble(nullptr) {
    26         assert ((stride % vectorWidth) == 0);
     26        assert ((vectorWidth % laneWidth) == 0);
    2727    }
    2828
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_sse_builder.h

    r6087 r6105  
    1313class IDISA_SSE_Builder : public virtual IDISA_Builder {
    1414public:
    15  
    16     IDISA_SSE_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned stride)
    17     : IDISA_Builder(C, bitBlockWidth, stride) {
     15    const unsigned NativeBitBlockWidth = 128;
     16    IDISA_SSE_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned laneWidth)
     17    : IDISA_Builder(C, NativeBitBlockWidth, bitBlockWidth, laneWidth) {
    1818
    1919    }
     
    2727class IDISA_SSE2_Builder : public IDISA_SSE_Builder {
    2828public:
    29  
    30     IDISA_SSE2_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned stride)
    31     : IDISA_Builder(C, bitBlockWidth, stride)
    32     , IDISA_SSE_Builder(C, bitBlockWidth, stride) {
     29    const unsigned NativeBitBlockWidth = 128; 
     30    IDISA_SSE2_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned laneWidth)
     31    : IDISA_Builder(C, NativeBitBlockWidth, bitBlockWidth, laneWidth)
     32    , IDISA_SSE_Builder(C, bitBlockWidth, laneWidth) {
    3333
    3434    }
     
    4545class IDISA_SSSE3_Builder : public IDISA_SSE2_Builder {
    4646public:
    47    
    48     IDISA_SSSE3_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned stride)
    49     : IDISA_Builder(C, bitBlockWidth, stride)
    50     , IDISA_SSE2_Builder(C, bitBlockWidth, stride)
     47    const unsigned NativeBitBlockWidth = 128;   
     48    IDISA_SSSE3_Builder(llvm::LLVMContext & C, unsigned bitBlockWidth, unsigned laneWidth)
     49    : IDISA_Builder(C, NativeBitBlockWidth, bitBlockWidth, laneWidth)
     50    , IDISA_SSE2_Builder(C, bitBlockWidth, laneWidth)
    5151    {
    5252
  • icGREP/icgrep-devel/icgrep/IR_Gen/idisa_target.cpp

    r6076 r6105  
    8181        // AVX512BW builder can only be used for BlockSize multiples of 512
    8282        if (hostCPUFeatures.hasAVX512F) {
    83             return new KernelBuilderImpl<IDISA_AVX512F_Builder>(C, codegen::BlockSize, codegen::BlockSize);
     83            return new KernelBuilderImpl<IDISA_AVX512F_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
    8484        }
    8585    }
     
    8888        // AVX2 or AVX builders can only be used for BlockSize multiples of 256
    8989        if (hostCPUFeatures.hasAVX2) {
    90             return new KernelBuilderImpl<IDISA_AVX2_Builder>(C, codegen::BlockSize, codegen::BlockSize);
     90            return new KernelBuilderImpl<IDISA_AVX2_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
    9191        } else if (hostCPUFeatures.hasAVX) {
    92             return new KernelBuilderImpl<IDISA_AVX_Builder>(C, codegen::BlockSize, codegen::BlockSize);
     92            return new KernelBuilderImpl<IDISA_AVX_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
    9393        }
    9494    } else if (codegen::BlockSize == 64) {
    95         return new KernelBuilderImpl<IDISA_I64_Builder>(C, codegen::BlockSize, codegen::BlockSize);
     95        return new KernelBuilderImpl<IDISA_I64_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
    9696    }
    97     if (SSSE3_available()) return new KernelBuilderImpl<IDISA_SSSE3_Builder>(C, codegen::BlockSize, codegen::BlockSize);
    98     return new KernelBuilderImpl<IDISA_SSE2_Builder>(C, codegen::BlockSize, codegen::BlockSize);
     97    if (SSSE3_available()) return new KernelBuilderImpl<IDISA_SSSE3_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
     98    return new KernelBuilderImpl<IDISA_SSE2_Builder>(C, codegen::BlockSize, codegen::LaneWidth);
    9999}
    100100#ifdef CUDA_ENABLED
    101101KernelBuilder * GetIDISA_GPU_Builder(llvm::LLVMContext & C) {
    102     return new KernelBuilderImpl<IDISA_NVPTX20_Builder>(C, 64, 64 * 64);
     102    return new KernelBuilderImpl<IDISA_NVPTX20_Builder>(C, 64 * 64, 64);
    103103}
    104104#endif
  • icGREP/icgrep-devel/icgrep/kernels/kernel_builder.h

    r6047 r6105  
    194194    llvm::Value * CreateCeilUMul2(llvm::Value * const number, const ProcessingRate::RateValue & factor, const llvm::Twine & Name = "");
    195195
     196    unsigned getStride() const {
     197        return mStride;
     198    }
     199
    196200protected:
    197201
    198     KernelBuilder(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    199     : IDISA::IDISA_Builder(C, vectorWidth, stride)
     202    KernelBuilder(llvm::LLVMContext & C, unsigned nativeVectorWidth, unsigned vectorWidth, unsigned laneWidth)
     203    : IDISA::IDISA_Builder(C, nativeVectorWidth, vectorWidth, laneWidth)
     204    , mStride(vectorWidth)
    200205    , mKernel(nullptr) {
    201206
    202207    }
     208   
     209    const unsigned mStride;
    203210
    204211    llvm::Value * getScalarFieldPtr(llvm::Value * instance, llvm::Value * index);
     
    212219protected:
    213220    const Kernel * mKernel;
     221   
    214222};
    215223
     
    217225class KernelBuilderImpl final : public KernelBuilder, public SpecifiedArchitectureBuilder {
    218226public:
    219     KernelBuilderImpl(llvm::LLVMContext & C, unsigned vectorWidth, unsigned stride)
    220     : IDISA::IDISA_Builder(C, vectorWidth, stride)
    221     , KernelBuilder(C, vectorWidth, stride)
    222     , SpecifiedArchitectureBuilder(C, vectorWidth, stride) {
     227    KernelBuilderImpl(llvm::LLVMContext & C, unsigned vectorWidth, unsigned laneWidth)
     228    : IDISA::IDISA_Builder(C, SpecifiedArchitectureBuilder::NativeBitBlockWidth, vectorWidth, laneWidth)
     229    , KernelBuilder(C, SpecifiedArchitectureBuilder::NativeBitBlockWidth, vectorWidth, laneWidth)
     230    , SpecifiedArchitectureBuilder(C, vectorWidth, laneWidth) {
    223231
    224232    }
  • icGREP/icgrep-devel/icgrep/toolchain/toolchain.h

    r6030 r6105  
    5656extern unsigned CacheDaysLimit;  // set from command line
    5757extern llvm::CodeGenOpt::Level OptLevel;  // set from command line
     58const unsigned LaneWidth = 64;
    5859extern unsigned BlockSize;  // set from command line
    5960extern unsigned SegmentSize;  // set from command line
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