Changes between Version 6 and Version 7 of IDISA_Vertical
 Timestamp:
 May 9, 2011, 6:25:29 AM (8 years ago)
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IDISA_Vertical
v6 v7 15 15 == Binary Operations == 16 16 17 These operations generally have the form `r = simd< N>::op(a, b)` for each18 operation `op`, where `a` and `b` are operand vectors of Nbit fields and `r` is17 These operations generally have the form `r = simd<w>::op(a, b)` for each 18 operation `op`, where `a` and `b` are operand vectors of ''w'' bit fields and `r` is 19 19 the corresponding result vector. 20 20 … … 37 37 == Unary Operations == 38 38 39 These operations generally have the form `r = simd< N>::op(a)` for each40 operation `op`, where `a` is an operand vector of Nbit fields and `r` is39 These operations generally have the form `r = simd<w>::op(a)` for each 40 operation `op`, where `a` is an operand vector of ''w'' bit fields and `r` is 41 41 the corresponding result vector. 42 42 43 43 Some of these operations involve operations on the high half of each 44 44 field h(a,,i,,) and the the low half of each field l(a,,i,,), where 45  h(a,,i,,) = a,,i,, >> N/246  l(a,,i,,) = a,,i,, & ((1 << N/2)  1)45  h(a,,i,,) = a,,i,, >> ''w''/2 46  l(a,,i,,) = a,,i,, & ((1 << ''w''/2)  1) 47 47 48 48 Some operations also involve an immediate shift operand supplied … … 54 54  `add_hl`  add halves  r,,i,, = h(a,,i,,) + l(a,,i,,) 55 55  `xor_hl`  bitwise xor halves  r,,i,, = h(a,,i,,) xor l(a,,i,,) 56  `slli<k>`  shift left logical immediate r,,i,, = a,,i,, << k57  `srli<k>`  shift right logical immediate r,,i,, = u(a,,i,,) >> k58  `srai<k>`  shift right arithmetic immediate r,,i,, = s(a,,i,,) >> k56  `slli<k>`  shift left logical immediate r,,i,, = a,,i,, << ''k''  57  `srli<k>`  shift right logical immediate r,,i,, = u(a,,i,,) >> ''k''  58  `srai<k>`  shift right arithmetic immediate r,,i,, = s(a,,i,,) >> ''k''  59 59  `popcount`  population count  r,,i,, = number of 1 bits in u(a,,i,,)  60 60  `ctz`  count trailing zeroes  r,,i,, = the number of consecutive 0 bits in a,,i,, counting from the right  … … 63 63 == Ternary Operation == 64 64 65 This operation has the form `r = simd< N>::op(a, b, c)` for each66 operation `op`, where `a`, `b`, and `c` are operand vectors of Nbit fields and `r` is65 This operation has the form `r = simd<w>::op(a, b, c)` for each 66 operation `op`, where `a`, `b`, and `c` are operand vectors of ''w'' bit fields and `r` is 67 67 the corresponding result vector. 68 68