Changes between Version 3 and Version 4 of SSE2_Hoisting


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Timestamp:
Apr 14, 2014, 5:02:04 PM (4 years ago)
Author:
cameron
Comment:

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  • SSE2_Hoisting

    v3 v4  
    2525intrinsics and the hoisting transformation used.   If the hoisting
    2626requires a nontrivial implementation involving more than a few LLVM
    27 instructions, then an LLVM function should be defined.   
     27instructions, then an LLVM function should be defined.   Note:
     28the ideal is to use a single LLVM operation.  If this is not
     29possible, a sequence of instructions implementing the intrinsic
     30as a parallel operation should be used.    Only as a last resort
     31should a fully sequential implementation be provided.   Marks
     32will be deducted for clearly suboptimal implementations.
    2833
    29342.  Hoist-Aware Code Generation. 
     
    3641    a.  In each case that an SSE2 intrinsic requires a sequence of LLVM operations (excluding bitcasts and constants), ensure that SSE2 code generation recognizes the transformed sequence to allow the single intrinsic to be produced during code generation.
    3742
    38     b.  Modify the code generator for at least one other target to recognize sequences produces by SSE2 hoisting and generate efficient code based on that recognition.
     43    a.  Modify the code generator for at least one other target to recognize sequences produces by SSE2 hoisting and generate efficient code based on that recognition.
    3944
    4045== Project Evaluation ==
     
    5762    a.  The result of the hoisted code compiled with SSE2/x86-64 as the target SIMD architecture.
    5863
    59     b.  The result of the hoisted code compiled with a later SIMD ISA on x86-64 architecture.
     64    a.  The result of the hoisted code compiled with a later SIMD ISA on x86-64 architecture.
    6065
    61     c.  The result of the hoisted code complied with non x86 architecture, such as ARM with Neon SIMD instructions.
     66    a.  The result of the hoisted code complied with non x86 architecture, such as ARM with Neon SIMD instructions.
    6267
    6368