Version 1 (modified by cameron, 3 years ago) (diff)


SSE2 Hoisting

The goal of this project is to turn SSE2 specific code written against the SSE2 SIMD instruction set into high-performance platform-independent code expressed using LLVM IR.

This project has two main subgoals.

  1. Hoisting.

Replace SSE2 intrinsics by single LLVM IR operations or short sequences of LLVM IR operations, wherever possible. Bitcasts may be freely introduced as required without penalty. In general, constant vectors may also be introduced with the expectation that the vector may either be completely eliminated during code generation or that the penalty will be small.

  1. Hoist-Aware Code Generation.

In this phase, we identify code selection and generation strategies to reverse effect of hoisting for SSE2 targets and to perform SSE2-aware optimizations for other targets.

  1. In each case that an SSE2 intrinsic requires a sequence of LLVM operations (excluding bitcasts and constants), ensure that

SSE2 code generation recognizes the transformed sequence to allow the single intrinsic to be produced during code generation.

  1. Modify the code generator for at least one other target to recognize sequences produces by SSE2 hoisting and generate efficient code based on that recognition.